Ch 2. Instructions: Language of the Computer -(2)

1. Introduction to Instruction Set Architecture

- The number of operands

Number of Operands

• Three Operands (MIPS Normally)
  • ADD A, B, C
    • Destination: A
    • Sources: B and C
    • (A ← B + C) or (C ← A + B)
• Two Operands
  • ADD A, B
    • Destination: A
    • Sources: A and B
    • (A ← A + B)
• One Operand
  • ADD A
    • Destination: AC(Accumulator)
    • Sources: A and AC
    • (AC ← AC + A)
  • LD(Load) A
    • Destination: AC
    • Source: A
    • (AC ← A)
• Zero Operand
  • PUSH A (TOS(Top Of Stack) ← A)
  • PUSH B (TOS ← B)
  • ADD (TOS ← A+B)
    • do not need an address field -> Zero Operand
  • POP C (C ← TOS)

The number of address field

Ex) op code: 5 bits, each address fields: 12 bits
→ 3 addr. inst. mach. : 5 + 3x12 = 41bits
→ 2 addr. inst. mach. : 5 + 2x12 = 29bits
→ 1 addr. inst. mach. : 5 + 1x12 = 17bits

=> address↑ bus(Processor와 Memory간의 이동) wider, instructions의 개수↓
컴퓨터는 기본적으로 32bits (MIPS) → 버스는 한번에 32bits까지 옮길 수 있다.
→ 32bits보다 큰 경우 bits를 쪼개거나 더 큰 버스를 이용 -> 더 큰 Cost발생

Exercise

Z = (A+B)/C
instruction이 줄어들면 연산량이 줄어든다

• Three Operands

  • ADD Z,A,B (Z←A+B)
    DIV Z,Z,C (Z←Z/C)

  • ADD A,A,B (A←A+B)
    DIV Z,A,C (Z←A/C)
    => A 원본의 손상

• Two Operands
  ‘MOV(move)’, ‘CLR(clear)’ extra instruction
  T(temp extra space)
  

  • MOV T,A (T←A)
    ADD T,B (T←T+B)
    DIV T,C (T←T(A+B)/C)
    MOV Z,T (Z←T)

  • MOV Z,A (Z←A)
    ADD Z,B (Z←Z+B)
    DIV Z,C (Z ← Z/C)

  • CLR Z (Z=0)
    ADD Z,A (Z←Z+A)
    ADD Z,B (Z←Z+B)
    DIV Z,C (Z←Z/C)

• One operand
  ‘MOV’

  • MOV A (AC←A)
    ADD B (AC←AC(A)+B)
    DIV C (AC←AC(A+B)/C)
    MOV Z (Z←AC)
    => definition problem

  • LOAD A (AC←A)
    ADD B (AC←AC+B)
    DIV C (AC←AC/C)
    STORE Z (Z←AC)

• Zero operand
  • PUSH A (TOS←A)
    PUSH B (TOS←B)
    ADD (TOS←A+B)
    PUSH C (TOS←C)
    DIV (TOS←(A+B)/C)
    POP Z (Z←TOS)